Parallel Subtractor — Circuit, Working & Truth Table Explained
A parallel subtractor is a combinational logic circuit that performs multi-bit binary subtraction simultaneously. Unlike serial subtractors that process one bit at a time, a parallel subtractor feeds all bits of the minuend and subtrahend into full subtractor stages at once, producing the difference output in a single clock cycle.
What is a Parallel Subtractor?
A parallel subtractor is a digital circuit that subtracts two n-bit binary numbers simultaneously using n full subtractors connected in cascade. The number of full subtractors required equals the number of bits being subtracted. For example, subtracting two 4-bit numbers requires 4 full subtractors, producing a 4-bit difference output (D₃D₂D₁D₀) and a final borrow output (B₄).
The key advantage is that all bits of the minuend (X₃X₂X₁X₀) and subtrahend (Y₃Y₂Y₁Y₀) are fed into the circuit simultaneously, unlike a serial subtractor which processes bits sequentially.
Full Subtractor — The Building Block
Each stage of a parallel subtractor uses a full subtractor. A full subtractor has three inputs — the minuend bit (Xᵢ), subtrahend bit (Yᵢ), and borrow-in (Bᵢ) — and produces two outputs: difference (Dᵢ) and borrow-out (Bᵢ₊₁).
Bᵢ₊₁ = X̄ᵢ·Bᵢ + X̄ᵢ·Yᵢ + Yᵢ·Bᵢ
4-Bit Parallel Subtractor Circuit
The figure below shows a 4-bit parallel subtractor constructed using four full subtractors (FS0 to FS3). The borrow output of each stage is connected as the borrow input to the next higher-order stage.
Working of Parallel Subtractor
The 4-bit parallel subtractor operates as follows:
- Stage 1 (LSB): X₀, Y₀, and B₀ (initially 0) are input to the first full subtractor. It produces difference D₀ and borrow B₁, which feeds into the second stage.
- Stage 2: X₁, Y₁, and B₁ are processed, producing D₁ and borrow B₂ for the third stage.
- Stage 3: X₂, Y₂, and B₂ are processed, producing D₂ and borrow B₃ for the fourth stage.
- Stage 4 (MSB): X₃, Y₃, and B₃ are processed, producing D₃ and the final borrow output B₄.
The final result is the 4-bit difference (D₃D₂D₁D₀) with borrow output B₄. If B₄ = 1, it indicates the subtrahend was larger than the minuend (negative result in 2's complement).
Truth Table
The truth table for a single full subtractor stage:
Numerical Example
Let us subtract 0011 (3) from 1001 (9) using a 4-bit parallel subtractor:
Subtrahend Y = 0011 (3₁₀)
B₀ = 0 (initial borrow)
Stage 1: X₀=1, Y₀=1, B₀=0 → D₀=0, B₁=0
Stage 2: X₁=0, Y₁=1, B₁=0 → D₁=1, B₂=1
Stage 3: X₂=0, Y₂=0, B₂=1 → D₂=1, B₃=1
Stage 4: X₃=1, Y₃=0, B₃=1 → D₃=0, B₄=0
Result: D₃D₂D₁D₀ = 0110 (6₁₀), B₄ = 0
Verification: 9 − 3 = 6 ✓
Propagation Delay & Limitations
The main limitation of a parallel subtractor is borrow propagation delay. Each full subtractor must wait for the borrow output from the previous stage before it can produce a valid result. In an n-bit parallel subtractor, the worst-case delay is:
For 4-bit: Delay = 4 × 2τ = 8τ (where τ = single gate delay)
To overcome this, look-ahead borrow generators (similar to carry look-ahead adders) can be used to pre-compute borrows, reducing delay to O(log n) instead of O(n).
Applications
- ALU (Arithmetic Logic Unit): Core component in processors for performing subtraction operations
- Digital Signal Processing: Used in filters, error correction, and signal comparison circuits
- Address Calculation: Computing memory offsets in microprocessors
- Comparators: Determining which of two binary numbers is larger by checking the borrow output
- Counter Circuits: Down-counters use subtraction logic for decrementing
Parallel Subtractor vs Parallel Adder
In practice, a parallel adder can perform subtraction by complementing the subtrahend (Y) and setting the initial carry to 1 (2's complement method), eliminating the need for a separate subtractor circuit.
Frequently Asked Questions
1. How many full subtractors are needed for an 8-bit parallel subtractor?
Eight full subtractors are needed — one for each bit position. This produces an 8-bit difference output and one borrow output.
2. What does the final borrow output (B₄) indicate?
If B₄ = 1, the subtrahend is larger than the minuend, meaning the result is negative. In 2's complement representation, the difference bits represent the magnitude in complemented form.
3. Can a parallel adder be used as a parallel subtractor?
Yes. By complementing all bits of the subtrahend (Y) using XOR gates and setting the initial carry input C₀ = 1, a parallel adder performs subtraction using the 2's complement method: X − Y = X + Ȳ + 1.
4. What is the main disadvantage of a ripple borrow parallel subtractor?
Borrow propagation delay — the MSB stage cannot produce a valid output until the borrow ripples through all previous stages. For an n-bit subtractor, worst-case delay grows linearly with n.
5. Where are parallel subtractors used in real-world applications?
They are used in ALUs of microprocessors, digital signal processing circuits, address offset calculators, magnitude comparators, and down-counter circuits.